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[Other resource] scrambler

Description: 通信系统中的加扰与解扰程序，用verilog语言实现，有波形文件可以直接查看功能
Platform: | Size: 324063 | Author: 桃子 | Hits:

[Other resource] pn_code

Description: 系数为4的扰码生成器，并每四位扰码产生一个触发串并转换的触发信号，可用于4b/5b编码的触发信号。verilog程序，带test程序-coefficient of the four scrambler generator, and every four scrambler have triggered a string conversion and the trigger signal can be used to trigger 4b/5b coding signal. Verilog procedures, with test procedures
Platform: | Size: 36602 | Author: 高广鹤 | Hits:

[VHDL-FPGA-Verilog] pn_code

Description: 系数为4的扰码生成器，并每四位扰码产生一个触发串并转换的触发信号，可用于4b/5b编码的触发信号。verilog程序，带test程序-coefficient of the four scrambler generator, and every four scrambler have triggered a string conversion and the trigger signal can be used to trigger 4b/5b coding signal. Verilog procedures, with test procedures
Platform: | Size: 35840 | Author: 高广鹤 | Hits:

[VHDL-FPGA-Verilog] scrambler

Description: 通信系统中的加扰与解扰程序，用verilog语言实现，有波形文件可以直接查看功能-Communication Systems scrambling and descrambling process, with Verilog language, has waveform files can be directly read features
Platform: | Size: 323584 | Author: 桃子 | Hits:

[VHDL-FPGA-Verilog] bluetooth

Description: ip核，蓝牙bluetooth的fpga硬件实现-ip nuclear, Bluetooth bluetooth realize the FPGA hardware
Platform: | Size: 16384 | Author: 惠普 | Hits:

[VHDL-FPGA-Verilog] SCRAMBLER

Description: 32位扰码器的verilog代码，编译通过-The Verilog code of 32_bit scrambler
Platform: | Size: 1024 | Author: 朱猪 | Hits:

[VHDL-FPGA-Verilog] DATA_scramble

Description: 扰码器的verilog实现,参考802.11a相关标准-Scrambler in verilog implementation
Platform: | Size: 1024 | Author: | Hits:

[VHDL-FPGA-Verilog] scrambler_17

Description: this parallel scrambler verilog code -this is parallel scrambler verilog code
Platform: | Size: 322560 | Author: rakhi | Hits:

[VHDL-FPGA-Verilog] yuanchengxu

Description: 基于Verilog HDL的通信系统设计-Design of communication system based on Verilog HDL
Platform: | Size: 49152 | Author: lnf | Hits:

[ELanguage] bin_count

Description: i m sending hdl code of dm using verilog and vhdl with all blocks contain fft,ifft,scrambler,transmitter,receiver.-i m sending hdl code of ofdm using verilog and vhdl with all blocks contain fft,ifft,scrambler,transmitter,receiver.
Platform: | Size: 28672 | Author: Nilesh panchal | Hits:

[VHDL-FPGA-Verilog] scrambler

Description: Verilog编写的ADC加扰程序（scrambler）里边附有加扰器的说明，实验可以把数据打散，可自行写testbench测试-Verilog prepared by the ADC scrambled program (scrambler) inside with scrambler description, experimental data can be broken up, write their own testbench test
Platform: | Size: 221184 | Author: 王红伟 | Hits:

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